Senior FPGA Engineer

Job description

Senior FPGA engineer developing components for 5G network

Do you want to work with the latest technology? And participate in the development of the future advanced 5G mobile networking components? Then join MTI Radiocomp.

 

About MTI Radiocomp:

Radiocomp is part of the MTI group doing advanced radio and network component development for 4 and 5G network infrastructure. And Radiocomp is a competence center in the MTI group doing Software, FPGA and DVT testing of Radio Head. They work closely with their sister sites in California and Taiwan and with some of the very largest players in the 5G industry. The work is internationally organized with close coordination between MTI sites and with customers located worldwide.

 

MTI Radiocomp – located in Hillerød - is R&D site acting as competence center within MTI for mobile baseband processing, radio SW development and radio conformance testing.

MTI Radiocomp is a dynamic company with flat structures, innovative culture, with tradition for teamwork and idea sharing. They believe in diversity, high individual freedom combined with personal responsibility. They are team players, supportive and friendly and expect you to be the same. They work agile and follow processes adjusted to company sizes – they believe processes should be value adding, not wall decoration.

 

The job and team:

As part of the Radiocomp FPGA team, you will be developing and supporting soft intellectual property cores, which are advanced functional modules with Radiocomp’s core technology wrapped in a package for use within MTI’s own mobile networking products or by leading system integrators to include in their SoC’s.

 

As the new FPGA senior developer, you’ll be part of the FPGA development team that develops protocol and DSP processing radio technologies for 5G mobile radio infrastructure deployments worldwide.

 

You will take an active role in maintaining MTI’s position as a market leader within mobile solutions and become a significant influencer in an energetic, engaged and professional team. And you’ll be a key contributor to definition of ASIC/FPGA architecture and implementation for future projects.

 

The ASIC/FPGA design work involves use of a wide range of advanced technologies and algorithms, and you will strive to deliver best quality and continuously work to improve our FPGA solutions, in close collaboration with the Systems Engineering team and SW team to achieve this.

 

MTI Radiocomp see you in multiple roles, both as project lead in some projects, and in the role of developer in other projects.

 

You will be working with legacy tier-1 integrators as well as with some of the most interesting newcomers in the mobile industry on development of the newest mobile technologies. MTI develops its own radio portfolio that is sold through integrators as well as under own brand. Your work will feed into this development.

 

You will be working with new packet-based cloud RAN implementations, power efficient L1-stack implementations, massive MIMO and much more. Through this work you will be influencing the way major operators build networks, as well as how the 5G standards will evolve.

 

As part of the MTI FPGA group you will be working with the latest and most powerful FPGA technologies and tools to support your work.

 

You will support a complete VHDL design flow from idea to product.

 

This requires:

  • Strong skills in turning systems requirements into efficient digital architectures
  • Proficiency in RTL VHDL coding and preferably strong skills with Verilog and SystemVerilog.
    • Expert level mastering of Xilinx Vivado Design Suite
  • Strong lab skills to enable efficient testing of designs

 

Main tasks for the team:

  • Development, support and maintenance of the next generation mobile IP-cores
  • Integrate algorithms into VHDL modules
  • Complete FPGA designs
  • Support the software team in developing the HW drivers.
  • Give input and spare with the system engineering team

 

Technical areas for the team:

  • Signal processing: e.g. FIR filters, Sample Rate Conversion, Signal Transformations, Encoding, Decoding etc.
  • Protocols: eCPRI, RoE, oRAN, CPRI, JESD204B, Ethernet, IP
  • Coding: FH-protocols, L1 functions, Error correcting codes, MIMO engines
  • Main scripting languages: Tcl, Python, Perl, Batch and Bash.
  • Main tools: Xilinx Vivado, ModelSim and Matlab

Job requirements

Your experiences and skills:

  • Master or bachelor’s in engineering or similar
  • Approx. 5 to 10 years of working experience with FPGA/ASIC design and signal processing.
  • Use to take a lead role in driving projects from architectural definition to validation testing
  • Experienced in digital protocol and signal processing design
  • Preferable have experience with System Verilog/UVM.
  • Strong skills in transforming a system level specification into an efficient FPGA/ASIC design
  • Proficiency in VHDL/Verilog design coding and Xilinx FPGA tools and design flow
  • Knowledge about ASIC design flows
  • Understanding of mobile network architectures and technologies
  • Understanding of embedded SW design flows to the level where you can support the SW team in developing HW drivers
  • Good understanding of FPGA/ASIC test methodologies at simulation/debug/Lab level
  • Knowledge about telecommunication systems and technologies, especially within mobile technologies will be an advantage.

 

Personal skills:

  • Personally, you strive to make a difference in our products, e.g. within current products and in defining 5G.
  • You are a systematic and solution-oriented person that contributes in bringing structure, good practices and proper documentation with your design.
  • You feel motivated by being the best within your field and an appreciated team player, that gets inspired when working in a team.
  • You are open to different cultures and changes in an international environment.
  • You have EU work experience and a resident permit for Denmark
  • Written and spoken English at high level.

 

Interested?

The recruitment process is handled by mpeople on behalf of Radiocomp. If you have any questions about the position or Radiocomp, please get in touch with Bettina Markussen on bettina@mpeople.dk or +45 29 68 46 89 

 

We look forward to hearing from you.